ISL9305
3
FN7605.1
August 15, 2011
Pin Configuration
ISL9305
(16 LD 4X4 TQFN)
TOP VIEW
E-PAD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
SCLK
VINDCD1
DCDPG
FB2
VINDCD2
FB1
SDAT
GNDLDO
Pin Descriptions
PIN
NUMBER
(TQFN)
NAME
DESCRIPTION
1
VINDCD1
Input voltage for buck converter DCD1 and it also serves as the power supply pin for the whole internal digital/ analog
circuits.
2
FB1
Feedback pin for DCD1, connect external voltage divider resistors between DCDC1 output, this pin and ground. For
fixed output versions, connect this pin directly to the DCD1 output.
3
SCLK
I
2
C interface clock pin.
4
SDAT
I
2
C interface data pin.
5
VINLDO1
Input voltage for LDO1.
6
VOLDO1
Output voltage of LDO1.
7
VOLDO2
Output voltage of LDO2.
8
VINLDO2
Input voltage for LDO2.
9
GNDLDO
Power ground for LDO1 and LDO2.
10
DCDPG
The DCDPG pin is an open-drain output to indicate the state of the DCD1/DCD2 output voltages. When both DCD1
and DCD2 are enabled, the output is released to be pulled high by an external pull-up resistor if both converter
voltages are within the power-good range. The pin will be pulled low if either DCD is outside their range. When only
one DCD is enabled, the state of the enabled DCDs output will define the state of the DCDPG pin. The DCDPG state
can be programmed for a delay of up to 200ms before being released to rise high. The programming range is
1ms~200ms through the I
2
C interface.
11
FB2
Feedback pin for DCD2, connect external voltage divider resistors between DCD2 output, this pin and ground. For
fixed output versions, connect this pin directly to the DCD2 output.
12
VINDCD2
Input voltage for buck converter DCD2.
13
SW2
Switching node for DCD2, connect to one terminal of the inductor.
14
GNDDCD2
Power ground for DCD2.
15
GNDDCD1
Power ground for DCD1.
16
SW1
Switching node for DCD1, connect to one terminal of the inductor.
E-pad
E-pad
Exposed Pad. Connect to system ground.
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ISL9307IRTAAJGZ-T7A
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